1. Field of the Invention
The present invention relates to power converters, and, more specifically, the present invention relates to the control of switching mode power converters.
2. Description of Related Art
Switching power converters have been widely used to provide regulated voltage and current. Based on the restriction of environmental pollution, power converters have been strived to meet the power management and energy conservation requirements. FIG. 1 shows a circuit schematic of a conventional power converter. A control circuit 10 generates a switching signal VPWM to regulate an output of the power converter in response to a feedback signal VFB. The switching signal VPWM and the feedback signal VFB are generated at a drive terminal VG and a feedback terminal FB of the control circuit 10 respectively. The switching signal VPWM drives a power transistor Q1 coupled to a power transformer T1 for switching the power transformer T1. The power transformer T1 having a primary-side winding NP and a secondary-side winding NS is connected to an input voltage VIN of the power converter for energy store and power transferring. The stored energy of the power transformer T1 is transferred to the output of the power converter through an output rectifier DO and an output capacitor CO for generating an output voltage VO. A first terminal of the secondary-side winding NS is connected to an anode of the output rectifier DO. A second terminal of the secondary-side winding NS is connected to the ground. The output capacitor CO is connected between a cathode of the output rectifier DO and the second terminal of the secondary-side winding NS.
A sense resistor RS is connected in series with the power transistor Q1 to generate a current signal VCS at a sense terminal CS of the control circuit 10 in response to a switching current IP of the power transformer T1. Through an output resistor RO coupled to the output of the power converter, a zener diode ZO is coupled from the output voltage VO to an input of an opto-coupler OP1. A forward current IO is derived from the input of the opto-coupler OP1. An output of the opto-coupler OP1 is coupled to the feedback terminal FB of the control circuit 10 to form a feedback loop. A feedback current IFB is also derived from the output of the opto-coupler OP1. The pulse width of the switching signal VPWM is modulated in response to the feedback signal VFB to achieve the regulation of the power converter.
FIG. 2 shows a control circuit of the conventional power converter. The control circuit 10 includes a PWM circuit 100 and a feedback resistor RFB. The PWM circuit 100 includes an oscillator (OSC) 110, a comparator 120, a D flip-flop 130, an inverter 140 and a logic circuit 150. The oscillator 110 is developed to generate a pulse signal PLS. A clock input ck of the D flip-flop 130 is coupled to the oscillator 110 to receive the pulse signal PLS. A supply voltage VCC is supplied to an input D of the D flip-flop 130. A first input of the logic circuit 150 is coupled to the oscillator 110 to receive the pulse signal PLS through the inverter 140 to limit the maximum duty cycle of the switching signal VPWM. An output Q of the D flip-flop 130 is coupled to a second input of the logic circuit 150. The switching signal VPWM is generated at an output of the logic circuit 150. The D flip-flop 130 is enabled and the PWM circuit 100 generates the switching signal VPWM in response to the pulse signal PLS.
The comparator 120 has a positive input coupled to a reference voltage VREF though the feedback resistor RFB. The feedback resistor RFB is coupled to the feedback loop. The positive input of the comparator 120 is also coupled to the feedback terminal FB of the control circuit 10 shown in FIG. 1 to receive the feedback signal VFB for the feedback loop control. The feedback signal VFB will be pulled high to the reference voltage VREF once the feedback loop and the output of the power converter are opened. A negative input of the comparator 120 is coupled to the sense terminal CS of the control circuit 10 shown in FIG. 1 to receive the current signal VCS for the pulse-width modulation control. An output of the comparator 120 is coupled to a reset input R of the D flip-flop 130 to reset the D flip-flop 130. The switching signal VPWM is disabled once the current signal VCS is higher than the feedback signal VFB. However, the drawback of the prior art is that the feedback resistor RFB is the same resistance no matter what the load condition is. In addition, the power loss at the feedback resistor RFB is a constant from no-load to full-load condition. It will obviously cause large power consumption and increase the power saving at no-load and light-load. On the other hand, when the power converter operates at no-load and light-load, the feedback current IFB at the feedback terminal FB will source a larger current from the opto-coupler OP1, and it will consume much operation current in the control circuit 10.
In order to improve power saving, the feedback resistor RFB needs to be switched to modulate the feedback impedance in response to the load condition, that is to say, the resistance of the feedback resistor RFB will be reduced at full-load and the resistance of the feedback resistor RFB will be increased at no-load and light-load. Under the same transistor built in the opto-coupler OP1, if the feedback resistor RFB can be increased at no-load and light-load, the operation current in the control circuit 10 will be reduced. Furthermore, the forward current IO and feedback current IFB will also be decreased at the same time. Therefore, it will improve the power saving by switching the feedback resistor RFB to modulate the feedback impedance from a lower resistance to a higher resistance according to the load condition.